1. Field of the Invention
The present invention relates to a semiconductor fabrication process. More particularly, the present invention relates to a method of cleaning wafers and a method of manufacturing gate structures on wafers.
2. Description of the Related Art
In the current semiconductor fabricating process, cleaning the wafer is one of the most important and frequent steps. The purpose of cleaning the wafer is to remove residues such as particles, organics or inorganic metallic ions from the surface. Hence, wafer cleaning is one of the critical factors affecting the yield as well as the quality and reliability of a device.
On the other hand, the fabrication of gate structures on a wafer is also an important process in the semiconductor fabricating process. The quality of the gate structures directly affects the subsequent yield, reliability and performance of a device. Therefore, how to achieve a high degree of cleanliness in the wafer to form a high-quality gate structures is a task to be dealt with.
The conventional technique of fabricating a gate structure includes providing a substrate having a gate dielectric layer (with a high dielectric constant K), a titanium nitride barrier layer and a polysilicon gate layer sequentially stacked thereon and then patterning these film layers to form a gate structure. Thereafter, hydrofluoric acid (HF), a mixture of hydrofluoric acid and hydrogen peroxide (HF/H2O2) or a fluorine-containing organic solvent is used to clean the surface of the substrate and remove any residues.
However, in the process of patterning the gate structure, along with the normal list of particles and pollutants, residual material from the removed polysilicon gate layer and the titanium nitride barrier layer may react to form silicon nitride residues. These silicon nitride residues may end up on the surface of the gate dielectric layer. When the gate dielectric layer is patterned, these silicon nitride residues may act as a mask over a portion of the gate dielectric layer such that the blocked area cannot be etched completely, leaving the gate dielectric residues. It should be noted that the gate dielectric residues are difficult to remove even with another cleaning operation because the residues are covered with silicon nitride residue. FIG. 3 is a photo of a portion of the surface of a silicon wafer taken by a scanning electron microscope (SEM) after performing a gate structure patterning and a conventional cleaning process. As shown in FIG. 3, a lot of white spots can be observed, which represent the residual materials 301 on the wafer. In other words, some silicon nitride residues and gate dielectric material remain on the wafer after the cleaning operation. As a result, these residues on the wafer will affect the quality and reliability of the subsequently formed devices.